General Register organization & Components of CPU and their functions:
A decoder is a combinational logic circuit that converts binary information from the n coded inputs to a maximum of 2n unique outputs. They are used in a wide variety of applications, including data demultiplexing, seven segment displays, and memory address decoding.
A mutliplexer (Mux) is a device used to select a single line of input from multiple input lines using control signals. In this diagram, D0 to D3 are input data lines and Y is the output.
Generally CPU has seven general registers. Register organization show how registers are selected and how data flow between register and ALU. A decoder is used to select a particular register.The output of each register is connected to two multiplexers to form the two buses A and B. The selection lines in each multiplexer select the input data for the particular bus.
The A and B buses form the two inputs of an ALU.The operation select lines decide the micro operation to be performed by ALU. The result of the micro operation is available at the output bus. The output bus connected to the inputs of all registers, thus by selecting a destination register it is possible to store the result in it.
A bus organization for seven CPU register
EXAMPLE:
• To perform the operation R3 = R1+R2 We have to provide following binary selection variable to the select inputs.
1. SEL A : 001 -To place the contents of R1 into bus A.
2. SEL B : 010 - to place the contents of R2 into bus B
3. SEL OPR : 10010 – to perform the arithmetic addition A+B
4. SEL REG or SEL D : 011 – to place the result available on output bus in R3.
Register and multiplexer input selection code
Binary code
|
SELA
|
SELB
|
SEL-D or SEL-REG
|
000
|
Input
|
Input
|
---
|
001
|
R1
|
R1
|
R1
|
010
|
R2
|
R2
|
R2
|
011
|
R3
|
R3
|
R3
|
100
|
R4
|
R4
|
R4
|
101
|
R5
|
R5
|
R5
|
110
|
R6
|
R6
|
R6
|
111
|
R7
|
R7
|
R7
|
Operation with symbol
Operation selection code
|
Operation
|
symbol
|
0000
|
Transfer A
|
TSFA
|
0001
|
Increment A
|
INC A
|
0010
|
A+B
|
ADD
|
0011
|
A-B
|
SUB
|
0100
|
Decrement A
|
DEC
|
0101
|
A AND B
|
AND
|
0110
|
A OR B
|
OR
|
0111
|
A XOR B
|
XOR
|
1000
|
Complement A
|
COMA
|
1001
|
Shift right A
|
SHR
|
1010
|
Shift left A
|
SHL
|
What is CONTROL WORD?
• The combined value of a binary selection inputs specifies the control word.
• It consist of four fields SELA,SELB,and SELD or SELREG contains three bit each and SELOPR field contains four bits thus the total bits in the control word are 13-bits.
SEL A
|
SELB
|
SELREG OR SELD
|
SELOPR
|
FORMATE OF CONTROL WORD
1. The three bit of SELA select a source registers of the a input of the ALU.
2. The three bits of SELB select a source registers of the b input of the ALU.
3. The three bits of SELED or SELREG select a destination register using the decoder.
4. The four bits of SELOPR select the operation to be performed by ALU.
CONTROL WORD FOR OPERATION R2 = R1+R3
SEL A
|
SEL B
|
SEL- D
OR SEL- REG |
SEL -OPR
|
001
|
011
|
010
|
0010
|
Note: Control words for all micro operation are stored in the control memory
Example:
MICROOPERATION |
SEL.A
|
SEL.B
|
SEL D OR SEL REG
|
SELOPR
|
CONTROL WORD
| |||
R2 = R1+R3
|
R1
|
R3
|
R2
|
ADD
|
001
|
011
|
010
|
0010
|
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