Program Control Instructions

Program Control Instructions
 • Branch Instructions
 • Procedure Call and Return Instructions

A program control instruction changes address value in the PC and hence the normal flow of execution.
 • Change in PC causes a break in the execution of instructions.
 • It is an important feature of the computers since it provides the control over the flow of the program and provides the capability to branch to different program segments.

Typical Program Control Instructions
 • Branch (BR) and Jump (JMP) instructions are used sometimes interchangeably but, they are different.
 • Branch and Jump instructions usually differ in addressing modes. • Usually Jump is used to refer to unconditional version of branch.
 • Skip (SKP) instructions is used to skip one(next) instruction. It can be conditional or unconditional. It does not need an address field.
 • In case of conditional skip instruction, the combination of conditional skip and a unconditional branch can be used an alternative of conditional branch. But, storing two instructions will take extra space.
 • In skip instruction we increment the PC in execution stage, effectively incrementing it by 2.
 SKP (skip if z=0 )
 JMP $100
 ADD R2,R1,R3

 BRNZ $100

Typical Program Control Instructions 
• Compare (CMP) instruction performs a comparison via a subtraction, with difference not retained.
 • The comparison causes one of the three following operations a. A conditional Branch ( 3ree addresses [2 registers and 1 memory] ) b. Change in the contents of a register ( 3ree addresses) c. Sets or resets stored status bits (2 addresses), this type of instruction is usually followed by a branch instruction to conditionally check the status bit and perform a branch.
 • Similarly test ( TEST) instructions performs the AND of two operands without retaining the result. • It also causes one the above three functions.

 Conditional Branch Instructions
 • A conditional branch instruction is a branch instruction that may or may not cause a transfer of control depending on the value of stored bits in the PSR (processor status register).
 • Each conditional branch instruction tests a different combination of Status bits for a condition.
 • If the condition is true, control is transferred to the effective address (PC←Add). If the condition is false, the program continues with the next instruction (PC←PC+1).
 • Below is a list of Conditional Branch instructions, letter ‘N’ stands for NOT.

 Conditional Branch Instructions 
• ‘C’ represents the carry, or borrow after arithmetic addition or subtraction.
 • ‘N’ represents the leftmost bit of the result of the operation i.e. sign bit.
 • ‘V’ is for overflow i.e. if the sign of the result is changed (inverted).
• ‘Z’ is for zero i.e., to check whether the result of an operation is zero (Z=1) or not zero (Z=0).

 Comparison Branch Instructions
 • Some branch instructions are a combination of compare and conditional branch instructions. They are run after the compare instruction has performed the comparison and status bits are updated.
 • Different status bits are checked for signed and unsigned numbers.
 • Keep in mind that
 • A≥B is complement of AB. That means if we know the condition of status bits for one, the condition for the other complementary relation is obtained by complement.


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